Electronic data processor



Dec. 15, 1964 c. H. PRoPsTER, JR., ETAL 3,161,855

ELECTRQNIC DATA PROCESSOR Filed Dec. 9, 1960 36 Sheets-Sheet 1 76.19 l ATTORNEY DeC- 15, 1964 c. H. PRoPsTER, JR., ETAL 3,161,855

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ELECTRONIC DATA PROCESSOR 36 Sheets-Sheet 3 Filed DeC. 9, 1960 Dec. l5, 1964 c. H. PROPSTER, JR., ETAL 3,161,855

ELECTRONIC DATA PROCESSOR Filed Dec. 9. 1960 56 Sheets-Sheet 4 Dec. l5, 1964 c. H. PRoPsTER, JR.. ETAL 3,161,355

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ELECTRONIC DATA PROCESSOR 56 Sheets-Sheetl 6 Filed Dec. 9, 1960 A 250,(/6 *6V 1911850 av f 50o/ec *6v J PROBE *6V A. IP +6 Dec. l5, 1964 c. H. PRoPsTER, JR.. ETAL 3,161,855

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ELECTRONIC DATA PROCESSOR 36 Sheets-Sheet 10 Filed Dec. 9, 1960 Dec. l5, 1964 c. H. PRoPsTER, JR., ETAL. 3,161,855

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ELECTRONIC DATA PROCESSOR Filed Dec. 9, 1960 36 Sheets-Sheet 12 Dec. l5, 1964 C. H. PROPSTER. JB., ETAL ELECTRONIC DATA PROCESSOR 56 Sheets-Sheet 13 Filed Dec. 9, 1960 Dec. 15, 1964 c. H. PROPsTER, JR.. ETAL 3,161,855

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ELECTRONIC DATA PROCESSOR 36 Sheets-Sheet 16 Filed Dec. 9. 1960 l l l.. nonni IE MNR W P `J @WNY Suhl he@ Il c. H. PRoPsTER, JR., ETAL 3,161,855

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Dec. 15, 1964 c. H. PRoPsTER, JR., ETAL 3,161,855

ELECTRONIC DATA PROCESSOR Filed Dec. 9, 1960 56 Sheets-Sheet 2O 0a if@ 95115 9 .(,0 11119 0 f j 1 I l '10 61116 (9 (10 JIJ@ 110e M102' 11112 4:1 ff G11 12 9 Q0 11151 6110s w3 11115 1?; I fixa 61118 Zz 9 .(j@ 171222 61110 W04? 11114 f f fg E 61119 12 s (2a H125 61111 *jb-g-w; H115 l Il 71x12 61120 61111 'W6 [Il 6 l 2511;@ 11125 l 61113 wf A117 f f .fza 61182 5 :53.52 11126 I 61114 We l K 9 7 6123 1&2 mi? s (9 d71'@ 41114 

3. IN A SYNCHRONOUS STORED-PROGRAM DIGITAL COMPUTER HAVING AN ADDRESSABLE MEMORY SECTION WITH SEQUENTIALLY ACCESSIBLE LOCATIONS N, N+1, N+2. . . N+Q. . .N+S, WERE N,Q AND S ARE ARBITARY INTEGERS, FOR THE STORAGE OF WORDS CONSISTING OF GROUPS OF DIGITAL SIGNALS REPRESENTATIVE OF INSTRUCTION ADDRESSES, INSTRUCTIONS AND OPERANDS, SAID LOCATIONS BEING SEQUENTIALLY ACCESSIBLE DURING SUCCESSIVE WORD-TIMES AND SAID INSTRUCTIONS COMPRISING A STORED PROGRAM WHICH INCLUDES AN ALTERNATIVE SEQUENCE OF INSTRUCTIONS TO BE EXECUTED UNDER CONTROL OF A CONDITIONAL BRANCH INSTRUCTION IN THE MAIN SEQUENCE OF INSTRUCTIONS IF A CONDITION SPECIFIED BY THE BRANCH INSTRUCTION IS PRESENT, THE COMBINATION COMPRISING: A FIRST REGISTER FOR STORING A GROUP OF DIGITAL SIGNALS REPRESENTATIVE OF AN INSTRUCTION; A SECOND REGISTER FOR STORING A GROUP OF DIGITAL SIGNALS WHICH REPRESENTS THE ADDRESS OF THE FIRST INSTRUCTION OF A SEQUENCE OF INSTRUCTIONS, THE INSTRUCTIONS OF SAID SEQUENCE BEING STORED IN SUCCESSIVE ALTERNATE MEMORY LOCATIONS; A FIRST MEANS FOR TRANSFERRING TO SAID SECOND REGISTER A GROUP OF DIGITAL SIGNALS REPRESENTING THE ADDRESS OF A MEMORY LOCATION WHEREIN THE FIRST OF A SEQUENCE OF INSTRUCTIONS IS LOCATED; A SECOND MEANS FOR SEQUENTIALLY READING INSTRUCTIONS FROM SAID MAIN SEQUENCE OF INSTRUCTIONS DURING ALTERNATE WORD-TIMES; A THIRD MEANS COUPLED TO SAID SECOND MEANS FOR TRANSFERRING SAID INSTRUCTIONS READ FROM ALTERNATE MEMORY LOCATIONS TO SAID FIRST REGISTER; A FOURTH MEANS FOR DECODING AND EXECUTING A GIVEN INSTRUCTION DURING A WORD-TIME IMMEDIATELY FOLLOWING THE WORD-TIME DURING WHICH IT IS TRANSFERRED TO SAID FIRST REGISTER; A FIFTH MEANS RESPONSIVE TO SAID FOURTH MEANS WHEN A CONDITIONAL BRANCH INSTRUCTION READ FROM LOCATION N IS DECODED FOR TRANSFERRING TO SAID SECOND REGISTER A GROUP OF DIGITAL SIGNALS FROM A LOCATION N+1, SAID GROUP OF DIGITAL SIGNALS REPRESENTING THE ADDRESS N+Q OF A LOCATION WHEREIN AN INSTRUCTION IS LOCATED WHICH IS THE FIRST INSTRUCTION OF AN ALTERMATIVE SEQUENCE OF INSTRUCTIONS; A SIXTH MEANS RESPONSIVE TO SAID FIFTH MEANS FOR DETERMINING WHETHER SAID SPECIFIED CONDITION IS PRESENT AND FOR PRODUCING A CONTROL SIGNAL IF THE SPECIFIED CONDITION IS NOT PRESENT; A SEVENTH MEANS RESPONSIVE TO SAID CONTROL SIGNAL FOR INHIBITING A TRANSFER OF SAID GROUP OF DIGITAL SIGNALS FROM SAID LOCATION N+1 TO SAID SECOND REGISTER, WHEREBY THE NEXT INSTRUCTION OF THE MAIN SEQUENCE OF INSTRUCTIONS IS TRANSFERRED TO SAID FIRST REGISTER FROM A MEMORY LOCATION N+2; MEANS RESPONSIVE TO THE ABSENCE OF SAID CONTROL SIGNAL FOR INITIATING A SEARCH FOR THE NEXT INSTRUCTION AT THE LOCATION N+Q AFTER A GROUP OF DIGITAL SIGNALS IS TRANSFERRED TO SAID SECOND REGISTER FROM THE LOCATION N+1; AND MEANS FOR INITIATING A TRANSFER OF A GROUP OF DIGITAL SIGNALS FROM THE MEMORY LOCATION N+Q TO SAID FIRST REGISTER WHEN THE LOCATION N+Q IS FOUND. 